Digital Design Engineer
Employment Type: Full-Time
Renesas Electronics Americas (REA) is a dynamic, multi-cultural tech company where employees can learn, mentor and thrive. REA brings together the strong financial foundation of a multi-billion dollar global operation and the flexibility and velocity of a smaller organization. We are developing technologies for the latest advances in mobile computing, secured connected devices, autonomous driving, smart homes and factories and more. Our solutions are at the heart of products developed by the major innovators around the world. Join us and be part of what’s next in electronics.
Renesas is looking for a Digital Design Engineer for our Power IC development team. This team develops high performance integrated solutions. The environment is fast-paced, and team members are empowered to make decisions within the scope of their job function. The successful candidate will be responsible for designing digital circuits and developing the mixed signal verification environment.
Job Responsibilities: Actively involved in all stages of product development including specification, design, synthesis, verification, timing analysis, design for test and silicon debug. Architecting and writing the RTL for such circuits as digital interfaces, controllers, state machines and algorithms. Performing synthesis and achieving timing convergence. Develop and verify self-tested test benches for Mixed Signal chips and sub-circuits. Strives for maximal verification coverage in the most time efficient manner. Works with team to integrate the AMS and DV verification plans into one Master verification plan. Works diligently to accomplish project goals and meet schedule requirements. Drives towards continuous personal, team, project and Company improvement
Requirements: Experience in Verilog RTL coding and versed in VerilogAMS, VerilogA, Verilog (or SV) languages Proficient developing design constraints and Synthesis scripts. Experience with behavioral top level modeling and mixed signal verification methodology. Experience with scan insertion and ATPG generation. Must be able to work independently with limited supervision. Must be very organized, self-motivated and passionate about the work. MSEE/PhD, or BSEE with relevant work experience with a strong background in digital design. Language skills: Written and verbal English language proficiency required. Tools: Cadence Design Tools and Synopsys DC proficiency required. Cadence AMS design flow experience is a definite plus.
Equal Opportunity Employer: Disability/Veteran* The salary listed in the header is an estimate based on salary data for similar jobs in the same area. Salary or compensation data found in the job description is accurate.
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