DFT Engineer Design-for-Test Hardware Engineer, Silicon Engineering

Cisco in San Jose, CA

  • Industry: Engineering - Others
  • Type: Full Time
position filled
**DFT Engineer Design-for-Test Hardware Engineer, Silicon Engineering** + Location: San Jose, California, US + Area of Interest Engineer - Hardware + Job Type Professional + Technology Interest Networking + Job Id 1276921 **Our creative and talented team as Design for Test Hardware Engineer in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive design for test requirements early in the design cycle. As a member of this team you will be involved in creating cutting edge next generation networking chips. You will be the lead to drive the DFT and quality process through the entire Implementation flow.** **"What You'll Do"** + **Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the design.** + **Responsible for development of innovative DFT IP in collaboration with the cross-functional teams, and play a key role in full chip design integration with the testability features integrated in the RTL** + **Work closely with the design/design-verification and physical design teams to enable the integration and validation of the Test logic in all phases of the design, and back-end implementation flow.** + **Your team will be responsible for Innovative Hardware DFT for new silicon device models, bare die & stacked die- driving re-usable test and debug strategies.** + **The job requires the candidate to have good scripting skills and the ability to design and debug with minimal oversight.** **"Who You Are"** **You are an ASIC Design for Test Hardware Engineer with 5+ years of related work experience with a broad mix of technologies including:** + **Excellent knowledge of latest state-of-the-art trends in DFT and test.** + **Hands-on experience with Jtag protocols, Scan and BIST architectures, including memory BIST, IO BIST** + **Verification skills include, System Verilog, UVM, Logic Equivalency checking and validating the Test-timing of the design.** + **Experience working with Gate level simulation, and debug with VCS and other simulators.** + **Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687** + **Strong verbal communication skills and ability to thrive in a dynamic environment** + **Scripting skills: Python/Perl.** + **Bachelor's or a Master's Degree in Electrical or Computer Engineering required** **Why Cisco** **We connect everything: people, processes, data, and things. We innovate everywhere, taking bold risks to shape the technologies that give us smart cities, connected cars, and handheld hospitals. And we do it in style with unique personalities who aren't afraid to change the way the world works, lives, plays and learns.** **We are thought leaders, tech geeks, pop culture aficionados, and we even have a few purple haired rock stars. We celebrate the creativity and diversity that fuels our innovation. We are dreamers and we are doers.** **dicedev** Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. </script>

You may be interested in these similar jobs!
Electrical Engineer
Intevac in Santa Clara, CA

JOB SUMMARY Intevac is seeking an electrical engineer to participate in the development of new digital imaging systems. We are looking for a team-ori…

Read More
DFT Engineer Design-for-Test Hardware Engineer, Silicon Engineering
Cisco in San Jose, CA

Our creative and talented team as Design for Test Hardware Engineer in San Jose, CA. You will work with Front-end RTL teams, backend physical de…

Read More
dft engineer - 9745111
Randstad in Menlo Park, CA

job summary: Seeking ax experienced DFT Engineer for our client located in Menlo Park. Our client is a Global Leader in Social Networking & Technolo…

Read More
ASIC DFT/DFD Implementation Engineer
Google in Sunnyvale, CA

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team …

Read More
R&D Engineer, II
Synopsys in Mountain View, CA

Business TitleR&D; Engineer, II21-Jan-2020Requisition Number24406BRJob Description and RequirementsJob Description and Requirements : Looking for inn…

Read More
DFX Engineer - Hardware
Nvidia in Santa Clara, CA

We are now looking for a DFT Engineer!NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth…

Read More
Senior DFT/UPF/STA Engineer
Synopsys in Mountain View, CA

Business TitleSenior DFT/UPF/STA Engineer10-Oct-2019Requisition Number23186BRJob Description and RequirementsIP Subsystem Solution Team at Synopsys i…

Read More
DFx Engineer
Intel Corporation in San Jose, CA

Job Description o Intel PSG is looking for a motivated DFx engineer to join an industry leading IC design team. This is an opportunity to work…

Read More
Product Engineer, ASIC
Google in Sunnyvale, CA

Google's custom-designed equipment makes up one of the largest and most powerful computing infrastructures in the world. The Manufacturing Operations…

Read More
DFT Lead
Oculus Rift in Menlo Park, CA

Facebook AR/VR focuses on delivering Facebook's vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power ef…

Read More
Product Development Engineer
Intel in Santa Clara, CA

Product Development EngineerJob DescriptionIn this role responsibilities may include, although not limited to:* Responsible for ensuring the testabil…

Read More